Concurrency crashes
- H1 HardwareMonitorService.RebuildTree now builds the tree under _updateLock, so it can't enumerate a hardware's _active HashSet while the update loop mutates it.
- A1 AppSettings now guards every dictionary read/write (and snapshots in Save) with a lock — safe under concurrent access from the parallel discovery threads.
- R2 Plumbed that same lock (HardwareMonitorService.SensorReadLock) into RemoteWebServer and wrapped the Prometheus sensor.Values enumeration with it.
- L1 Computer — refactored Add into AddCore, which performs the cancellation/enabled re-check and the _groups insertion atomically under _lock. A deferred task can
no longer add (and leak) a group after Close() drained the list; if it loses the race it closes the group instead.
- M1 UpdateTimer_Tick now bails before/after the await when _isShuttingDown is set in MainWindow_Closed, so an in-flight tick won't touch the disposed
view-model/Computer.
Broken behavior
- T1 Tray callback now decodes NOTIFYICON_VERSION_4 correctly (message = LOWORD(lParam), icon id = HIWORD(lParam)) — right-click menu and double-click work again.
- M2 A transient update exception no longer calls _timer.Stop(); the loop keeps running.
- H2 Newly discovered (deferred) storage devices get the current ForceDriveWakeup setting applied in HardwareChanged.
- V2 Sensor items carry a parent reference; toggling IsVisible recomputes the parent group's visibility, so no empty group headers. (Strengthened the existing test
that had skipped this assertion.)
- H3 Tree-rebuild coalescing now uses a dirty flag with a re-check, so a change arriving during a rebuild isn't lost.
- R4 Web routing matches endpoints exactly on the query-stripped path (Url.AbsolutePath), so static assets like metrics.html aren't hijacked.
- L8 IntelCpu.Update skips the bus/core-clock math while TimeStampCounterFrequency is still 0 (deferred-TSC window), so clocks keep their prior value instead of
reporting 0 MHz.
- V1 Existing plot series keep their assigned color; only an explicit user pen color updates them (no per-tick color shifting).
- M3 Runtime errors write to a dedicated runtime.log (once), instead of overwriting the shared startup.log.
- T2 CreateSensorIcon returns IntPtr.Zero on DIB failure instead of the shared main-icon handle (which callers DestroyIcon).
I also set _isOpen = false in HardwareMonitorService.Dispose so the rebuild guard actually holds during shutdown (the latent after-close-rebuild issue adjacent to
H3
* Add support for Intel Panther Lake microarchitecture
* Reorder RaptorLake in CPU microarchitecture list
* Handle unknown microarchitecture case in IntelCpu
* Refactor Intel CPU microarchitecture detection
* More precise system utilization
* The current method usually indicates a load that is too low
* SYSTEM_PROCESSOR_PERFORMANCE_INFORMATION idle time error in Windows11 22H2 is fixed
* consistent with Process Explorer, Hwinfo, SIV
* Add fix for old Windows 11 Versions 22H2 and 23H2
Source: https://github.com/LibreHardwareMonitor/LibreHardwareMonitor/pull/1571
Additional error checks for load calculation
* Update CpuLoad.cs
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Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
* Ryzen 9000 Core Frequency Bugfix
Zen5 (Ryzen 9000) has a changed register mapping for readout core frequency
* Update Ryzen 9000 and Core Clock
* fixed Package Power and Core power Calculation, use ESU for power scaling
* Changed DateTime.Now to UtcNow (better performance)
* Added Effective core clock
* Added Average Core clock and Average effective clock
* Remove Effective clock from SMU
Core effective clock is now calculated in Amd17Cpu/Core
* Fix Clock Ratio calculation.
Ratio > 1 is not possible
* Update Amd17Cpu.cs
---------
Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
* Add MSR_PLATFORM_ENERGY_COUNTER (0x64D)
MSR_PLATFORM_ENERGY_COUNTER 0x64D is a platform energy counter register according to
p. 2-272, "Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 4: Model-Specific Registers"
It's description is:
> Total energy consumed by all devices in the platform
> that receive power from integrated power delivery
> mechanism, included platform devices are processor
> cores, SOC, memory, add-on or peripheral devices that
> get powered directly from the platform power delivery
> means. The energy units are specified in the
> MSR_RAPL_POWER_UNIT.Enery_Status_Unit.
* Update IntelCpu.cs
---------
Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
JMR-dev
A1ive