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added support for Intel ElkhartLake (#1625)

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* Intel Arrow Lake 200 added

* added SAPPHIRERAPIDS support

* changed naming from SAPPHIRERAPIDS to SapphireRapids

* added support for ElkhartLake
This commit is contained in:
Markus H.
2025-02-04 16:30:00 +01:00
committed by GitHub
parent aee6354102
commit 8d612d20da
1 changed files with 17 additions and 9 deletions
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LibreHardwareMonitorLib/Hardware/Cpu/IntelCpu.cs
+17 -9
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@@ -230,10 +230,14 @@ internal sealed class IntelCpu : GenericCpu
case 0xBD: // Intel Core Ultra 5/7 200 Series LunarLake
_microArchitecture = MicroArchitecture.LunarLake;
tjMax = GetTjMaxFromMsr();
break;
break;
case 0x8F: // Intel Xeon W5-3435X // SapphireRapids
_microArchitecture = MicroArchitecture.SapphireRapids;
tjMax = GetTjMaxFromMsr();
break;
case 0x96: // Intel Celeron ElkhartLake
_microArchitecture = MicroArchitecture.ElkhartLake;
tjMax = GetTjMaxFromMsr();
break;
default:
@@ -301,8 +305,9 @@ internal sealed class IntelCpu : GenericCpu
case MicroArchitecture.SandyBridge:
case MicroArchitecture.Silvermont:
case MicroArchitecture.Skylake:
case MicroArchitecture.TigerLake:
case MicroArchitecture.SapphireRapids:
case MicroArchitecture.TigerLake:
case MicroArchitecture.SapphireRapids:
case MicroArchitecture.ElkhartLake:
case MicroArchitecture.Tremont:
if (Ring0.ReadMsr(MSR_PLATFORM_INFO, out eax, out uint _))
_timeStampCounterMultiplier = (eax >> 8) & 0xff;
@@ -418,8 +423,9 @@ internal sealed class IntelCpu : GenericCpu
MicroArchitecture.SandyBridge or
MicroArchitecture.Silvermont or
MicroArchitecture.Skylake or
MicroArchitecture.TigerLake or
MicroArchitecture.SapphireRapids or
MicroArchitecture.TigerLake or
MicroArchitecture.SapphireRapids or
MicroArchitecture.ElkhartLake or
MicroArchitecture.Tremont)
{
_powerSensors = new Sensor[_energyStatusMsrs.Length];
@@ -623,8 +629,9 @@ internal sealed class IntelCpu : GenericCpu
case MicroArchitecture.SandyBridge:
case MicroArchitecture.Silvermont:
case MicroArchitecture.Skylake:
case MicroArchitecture.TigerLake:
case MicroArchitecture.SapphireRapids:
case MicroArchitecture.TigerLake:
case MicroArchitecture.SapphireRapids:
case MicroArchitecture.ElkhartLake:
case MicroArchitecture.Tremont:
_coreClocks[i].Value = (float)(((eax >> 8) & 0xff) * newBusClock);
break;
@@ -716,8 +723,9 @@ internal sealed class IntelCpu : GenericCpu
Skylake,
TigerLake,
Tremont,
RaptorLake,
SapphireRapids,
RaptorLake,
SapphireRapids,
ElkhartLake,
Unknown
}