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Add Alder Lake and Jasper Lake (#589)

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Fixes #588
This commit is contained in:
PhyxionNL
2021-11-03 10:49:50 +01:00
committed by GitHub
parent 1701eb91b2
commit 23f515612c
1 changed files with 16 additions and 0 deletions
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LibreHardwareMonitorLib/Hardware/Cpu/IntelCpu.cs
+16
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@@ -184,6 +184,14 @@ namespace LibreHardwareMonitor.Hardware.CPU
_microArchitecture = MicroArchitecture.TigerLake;
tjMax = GetTjMaxFromMsr();
break;
case 0x97: // Alder Lake (7nm)
_microArchitecture = MicroArchitecture.AlderLake;
tjMax = GetTjMaxFromMsr();
break;
case 0x9C: // Jasper Lake (10nm)
_microArchitecture = MicroArchitecture.JasperLake;
tjMax = GetTjMaxFromMsr();
break;
case 0xA7: // Intel Core i5, i6, i7 11xxx (14nm) (Rocket Lake)
_microArchitecture = MicroArchitecture.RocketLake;
tjMax = GetTjMaxFromMsr();
@@ -235,6 +243,7 @@ namespace LibreHardwareMonitor.Hardware.CPU
break;
}
case MicroArchitecture.Airmont:
case MicroArchitecture.AlderLake:
case MicroArchitecture.Broadwell:
case MicroArchitecture.CannonLake:
case MicroArchitecture.CometLake:
@@ -243,6 +252,7 @@ namespace LibreHardwareMonitor.Hardware.CPU
case MicroArchitecture.Haswell:
case MicroArchitecture.IceLake:
case MicroArchitecture.IvyBridge:
case MicroArchitecture.JasperLake:
case MicroArchitecture.KabyLake:
case MicroArchitecture.Nehalem:
case MicroArchitecture.RocketLake:
@@ -348,6 +358,7 @@ namespace LibreHardwareMonitor.Hardware.CPU
}
if (_microArchitecture == MicroArchitecture.Airmont ||
_microArchitecture == MicroArchitecture.AlderLake ||
_microArchitecture == MicroArchitecture.Broadwell ||
_microArchitecture == MicroArchitecture.CannonLake ||
_microArchitecture == MicroArchitecture.CometLake ||
@@ -356,6 +367,7 @@ namespace LibreHardwareMonitor.Hardware.CPU
_microArchitecture == MicroArchitecture.Haswell ||
_microArchitecture == MicroArchitecture.IceLake ||
_microArchitecture == MicroArchitecture.IvyBridge ||
_microArchitecture == MicroArchitecture.JasperLake ||
_microArchitecture == MicroArchitecture.KabyLake ||
_microArchitecture == MicroArchitecture.RocketLake ||
_microArchitecture == MicroArchitecture.SandyBridge ||
@@ -532,6 +544,7 @@ namespace LibreHardwareMonitor.Hardware.CPU
break;
}
case MicroArchitecture.Airmont:
case MicroArchitecture.AlderLake:
case MicroArchitecture.Broadwell:
case MicroArchitecture.CannonLake:
case MicroArchitecture.CometLake:
@@ -540,6 +553,7 @@ namespace LibreHardwareMonitor.Hardware.CPU
case MicroArchitecture.Haswell:
case MicroArchitecture.IceLake:
case MicroArchitecture.IvyBridge:
case MicroArchitecture.JasperLake:
case MicroArchitecture.KabyLake:
case MicroArchitecture.RocketLake:
case MicroArchitecture.SandyBridge:
@@ -603,6 +617,7 @@ namespace LibreHardwareMonitor.Hardware.CPU
private enum MicroArchitecture
{
Airmont,
AlderLake,
Atom,
Broadwell,
CannonLake,
@@ -613,6 +628,7 @@ namespace LibreHardwareMonitor.Hardware.CPU
Haswell,
IceLake,
IvyBridge,
JasperLake,
KabyLake,
Nehalem,
NetBurst,