* Add support for Intel Panther Lake microarchitecture
* Reorder RaptorLake in CPU microarchitecture list
* Handle unknown microarchitecture case in IntelCpu
* Refactor Intel CPU microarchitecture detection
* NVIDIA GPU: reserve load index 3 for GPU Memory, remap other loads
* NVIDIA GPU: simplify load sensor indexing
* NVIDIA GPU: create GPU Memory load after utilization loads
Place the GPU Memory Load sensor before power topology and D3D node loads
so it appears with other GPU metrics in the UI. Load indices advance in
the same order as before for uniqueness.
* NVIDIA GPU: use local nextLoadIndex in constructor
Replace the instance field with a ctor-local counter for Load sensor indices.
* feat: Add Native AOT compilation support for LibreHardwareMonitorLib
- Replace non-generic Marshal.GetDelegateForFunctionPointer with generic versions
(NvApi.cs, NvidiaML.cs, OpCode.cs)
- Replace non-generic Marshal.PtrToStructure/SizeOf with generic versions
(AtiAdlxx.cs, AmdGpu.cs, Ipmi.cs)
- Replace reflection-based Mono.Posix calls with direct Syscall for non-NETFRAMEWORK
(OpCode.cs)
- Add DynamicallyAccessedMembers annotations for trim-safe generic marshaling
(MsiCoreLiquidController.cs, WireViewPro2.cs)
- Add IsAotCompatible, IsTrimmable, and AOT/trim analyzers to csproj for net8.0+
- All changes maintain full backward compatibility with net472/netstandard2.0
Tested: dotnet publish with PublishAot=true on net10.0 win-x64 succeeds.
AOT binary correctly enumerates all hardware and sensors without errors.
* feat: Add conditional compilation for .NET 5.0 or greater in various classes
* feat: Add AOT test project and update workflows for AOT compilation
* Drop test project
* NET5_0_OR_GREATER > NET
---------
Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
* Add NCT6687DR fan control support with bit mapping and configuration phase handling
* NCT6687DR: emulate CC_Engine SetManualFAN protocol
- System fans (index > 8): skip manual mode bit (0xA00), use flat SmartFAN curve instead
- Change commit value from 0x40 to 0xC0 (REQ|DONE) matching CC_Engine
- Write 7-point temp curve (all 0x20/32C) alongside duty curve for system fans
- Add Sleep(10ms) after request (0x80) and commit (0xC0) per CC_Engine timing
- Restore: only clear manual mode bit for CPU/Pump/Chipset/EZ-Connect fans
* NCT6687DR: add INVALID bit check with retry after EC commit
- FinishFanCfgUpdate now returns bool: false if EC sets INVALID (0xCF8 & 0x10)
- SetControl and RestoreDefaultFanControl retry up to 3 times on INVALID
- Matches CC_Engine's post-commit validation behavior
* fix(NCT6687DR): bypass SmartFAN engine for system fans — use direct PWM
System fans (SYSFAN1-7) now use the same direct PWM mechanism as
CPU/Pump/Chipset fans, completely bypassing the SmartFAN curve engine
and its inherent ~2%/sec PWM smoothing.
Key changes:
- FAN_PWM_COMMAND_REG: system fans now point to direct PWM registers
(SYSFAN7: 08:E9, SYSFAN1-6: 02:65..02:60) instead of SmartFAN
curve base addresses (0xBE0..0xC70)
- FAN_CONTROL_MODE_REG: system fans use 08:0F (not 0xA00) for their
manual-mode enable bits
- FAN_CONTROL_MODE_BIT: corrected per-channel bit positions derived
from BIOS unk_104C0 table (sub_2F50 / sub_2BDC analysis)
- Set6687DRControl: simplified to single WriteByte for all fans
(no more 7-point flat curve + step/rate writes)
- SetControl: unified path — all fans set manual-mode bit + direct PWM
- RestoreDefaultFanControl: clear manual-mode bit to return to SmartFAN
Register mapping discovered via IDA analysis of BIOS firmware:
- Extended unk_101E0 table at 0x103AC contains channels 10-15
- sub_2BDC configures 5 register operations per channel before curve write
- Entry[1] in unk_104C0 = manual-mode enable register + bit position
* review: Stopwatch, engineSts rename, CompleteFanConfigUpdate
* refactor: PreciseWait via SpinWait, DateTime to Stopwatch in ReadByte/WriteByte
* review: remove regions, revert PreciseWait to Thread.Sleep
* fix: skip integrated GPU in IGCL enumeration to prevent duplicate hardware entries
IGCL's ctlEnumerateDevices returns all Intel graphics devices including
the integrated GPU, but IntelDiscreteGpu was created for every device
without filtering. This caused the iGPU to appear twice: once from the
IGCL path (as IntelDiscreteGpu) and once from the D3D path (as
IntelIntegratedGpu), with overlapping sensors.
Check the CTL_ADAPTER_PROPERTIES_FLAG_INTEGRATED flag on each device's
graphics_adapter_properties and skip integrated adapters, since they are
already handled by IntelIntegratedGpu via D3D enumeration.
Co-authored-by: Cursor <cursoragent@cursor.com>
* feat: add IGCL-based telemetry sensors for Intel integrated GPUs
Use Intel Graphics Control Library (IGCL) to expose temperature, clock
frequency, and voltage sensors for the integrated GPU via the safe
user-mode ctlPowerTelemetryGet API. Each sensor is only activated if
the driver reports it as supported, so this degrades gracefully on
hardware/drivers that don't expose specific telemetry items.
This mirrors the approach already used by IntelDiscreteGpu, bringing
parity between discrete and integrated Intel GPU monitoring.
Depends on: fix/intel-igpu-deduplication
Co-authored-by: Cursor <cursoragent@cursor.com>
---------
Co-authored-by: Cursor <cursoragent@cursor.com>
IGCL's ctlEnumerateDevices returns all Intel graphics devices including
the integrated GPU, but IntelDiscreteGpu was created for every device
without filtering. This caused the iGPU to appear twice: once from the
IGCL path (as IntelDiscreteGpu) and once from the D3D path (as
IntelIntegratedGpu), with overlapping sensors.
Check the CTL_ADAPTER_PROPERTIES_FLAG_INTEGRATED flag on each device's
graphics_adapter_properties and skip integrated adapters, since they are
already handled by IntelIntegratedGpu via D3D enumeration.
Co-authored-by: Cursor <cursoragent@cursor.com>
* Implement Fan control for TG WVP2.
Calculate approximate fan speed.
Catch two exceptions.
Remove leftover close in ReadConfig.
* Support for multi device detection
* Add more data to report
* Add group for power monitors and remove from GenericGpu.
* Move files.
Add option for Power Monitor in Computer + UI.
* Add support for MSI MAG B850 Tomahawk Wifi (non-max) using NCT6687DR Controller
* Handle MSI NCT6687DR SIO Controller declaration more elegantly
This is a more powerful yet elegant way of handling MSI motherboards with the MSI flavored Nuvoton NCT6687D (aka NCT6687D-R). While it still requires that support be manually added for each motherboard so it be properly identified, this reduces the amount of work to add support and also reduces the amount of clutter in LpcIO.cs.
* Add support for MSI MEG X870E ACE MAX
* Foundational support for ALL MSI B840/B850, X870(E), and Z890 Motherboards!
Assigns all MSI B840, B850, X870, X870E and Z890 motherboards the NCT6687D-R SIO Controller
* Remove MSI B850 GAMING PLUS WIFI6E NCT6687D handling
* Used more stringent comparison criteria for MSI 800 series NCT6687DR identification
mirko93s