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Add support for Intel Comet Lake

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Also add CORS header for https://github.com/openhardwaremonitor/openhardwaremonitor/issues/1234
This commit is contained in:
Phyxion
2020-03-02 17:14:00 +01:00
parent 5bd108167d
commit 42e6a3eb19
2 changed files with 57 additions and 47 deletions
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LibreHardwareMonitor/Utilities/HttpServer.cs
+2 -1
View File
@@ -415,11 +415,12 @@ namespace LibreHardwareMonitor.Utilities
#if DEBUG
string responseContent = json.ToString(Newtonsoft.Json.Formatting.Indented);
#else
var responseContent = json.ToString(Newtonsoft.Json.Formatting.None);
string responseContent = json.ToString(Newtonsoft.Json.Formatting.None);
#endif
byte[] buffer = Encoding.UTF8.GetBytes(responseContent);
response.AddHeader("Cache-Control", "no-cache");
response.AddHeader("Access-Control-Allow-Origin", "*");
response.ContentLength64 = buffer.Length;
response.ContentType = "application/json";
LibreHardwareMonitorLib/Hardware/Cpu/IntelCpu.cs
+55 -46
View File
@@ -170,6 +170,10 @@ namespace LibreHardwareMonitor.Hardware.CPU
_microArchitecture = MicroArchitecture.IceLake;
tjMax = GetTjMaxFromMsr();
break;
case 0xA6: // Intel Core i3, i5, i7 10xxxU (14nm)
_microArchitecture = MicroArchitecture.CometLake;
tjMax = GetTjMaxFromMsr();
break;
case 0x86: // Tremont (10nm) (Elkhart Lake, Skyhawk Lake)
_microArchitecture = MicroArchitecture.Tremont;
tjMax = GetTjMaxFromMsr();
@@ -214,29 +218,31 @@ namespace LibreHardwareMonitor.Hardware.CPU
// set timeStampCounterMultiplier
switch (_microArchitecture)
{
case MicroArchitecture.NetBurst:
case MicroArchitecture.Atom:
case MicroArchitecture.Core:
case MicroArchitecture.NetBurst:
{
if (Ring0.ReadMsr(IA32_PERF_STATUS, out uint _, out uint edx))
{
_timeStampCounterMultiplier = ((edx >> 8) & 0x1f) + 0.5 * ((edx >> 14) & 1);
}
break;
}
break;
case MicroArchitecture.Airmont:
case MicroArchitecture.Broadwell:
case MicroArchitecture.CannonLake:
case MicroArchitecture.CometLake:
case MicroArchitecture.Goldmont:
case MicroArchitecture.GoldmontPlus:
case MicroArchitecture.Haswell:
case MicroArchitecture.IceLake:
case MicroArchitecture.IvyBridge:
case MicroArchitecture.KabyLake:
case MicroArchitecture.Nehalem:
case MicroArchitecture.SandyBridge:
case MicroArchitecture.IvyBridge:
case MicroArchitecture.Haswell:
case MicroArchitecture.Broadwell:
case MicroArchitecture.Silvermont:
case MicroArchitecture.Skylake:
case MicroArchitecture.Airmont:
case MicroArchitecture.Goldmont:
case MicroArchitecture.KabyLake:
case MicroArchitecture.GoldmontPlus:
case MicroArchitecture.CannonLake:
case MicroArchitecture.IceLake:
case MicroArchitecture.TigerLake:
case MicroArchitecture.Tremont:
{
@@ -335,18 +341,19 @@ namespace LibreHardwareMonitor.Hardware.CPU
ActivateSensor(_coreClocks[i]);
}
if (_microArchitecture == MicroArchitecture.SandyBridge ||
_microArchitecture == MicroArchitecture.IvyBridge ||
_microArchitecture == MicroArchitecture.Haswell ||
if (_microArchitecture == MicroArchitecture.Airmont ||
_microArchitecture == MicroArchitecture.Broadwell ||
_microArchitecture == MicroArchitecture.Skylake ||
_microArchitecture == MicroArchitecture.Silvermont ||
_microArchitecture == MicroArchitecture.Airmont ||
_microArchitecture == MicroArchitecture.Goldmont ||
_microArchitecture == MicroArchitecture.KabyLake ||
_microArchitecture == MicroArchitecture.GoldmontPlus ||
_microArchitecture == MicroArchitecture.CannonLake ||
_microArchitecture == MicroArchitecture.CometLake ||
_microArchitecture == MicroArchitecture.Goldmont ||
_microArchitecture == MicroArchitecture.GoldmontPlus ||
_microArchitecture == MicroArchitecture.Haswell ||
_microArchitecture == MicroArchitecture.IceLake ||
_microArchitecture == MicroArchitecture.IvyBridge ||
_microArchitecture == MicroArchitecture.KabyLake ||
_microArchitecture == MicroArchitecture.SandyBridge ||
_microArchitecture == MicroArchitecture.Silvermont ||
_microArchitecture == MicroArchitecture.Skylake ||
_microArchitecture == MicroArchitecture.TigerLake ||
_microArchitecture == MicroArchitecture.Tremont)
{
@@ -495,7 +502,9 @@ namespace LibreHardwareMonitor.Hardware.CPU
_packageTemperature.Value = tjMax - tSlope * deltaT;
}
else
{
_packageTemperature.Value = null;
}
}
if (HasTimeStampCounter && _timeStampCounterMultiplier > 0)
@@ -514,20 +523,20 @@ namespace LibreHardwareMonitor.Hardware.CPU
uint multiplier = eax & 0xff;
_coreClocks[i].Value = (float)(multiplier * newBusClock);
break;
}
case MicroArchitecture.SandyBridge:
case MicroArchitecture.IvyBridge:
case MicroArchitecture.Haswell:
case MicroArchitecture.Broadwell:
case MicroArchitecture.Silvermont:
}
case MicroArchitecture.Airmont:
case MicroArchitecture.Skylake:
case MicroArchitecture.Goldmont:
case MicroArchitecture.KabyLake:
case MicroArchitecture.GoldmontPlus:
case MicroArchitecture.Broadwell:
case MicroArchitecture.CannonLake:
case MicroArchitecture.CometLake:
case MicroArchitecture.Goldmont:
case MicroArchitecture.GoldmontPlus:
case MicroArchitecture.Haswell:
case MicroArchitecture.IceLake:
case MicroArchitecture.IvyBridge:
case MicroArchitecture.KabyLake:
case MicroArchitecture.SandyBridge:
case MicroArchitecture.Silvermont:
case MicroArchitecture.Skylake:
case MicroArchitecture.TigerLake:
case MicroArchitecture.Tremont:
{
@@ -535,7 +544,6 @@ namespace LibreHardwareMonitor.Hardware.CPU
_coreClocks[i].Value = (float)(multiplier * newBusClock);
break;
}
default:
{
double multiplier = ((eax >> 8) & 0x1f) + 0.5 * ((eax >> 14) & 1);
@@ -586,25 +594,26 @@ namespace LibreHardwareMonitor.Hardware.CPU
[SuppressMessage("ReSharper", "IdentifierTypo")]
private enum MicroArchitecture
{
Unknown,
NetBurst,
Core,
Atom,
Nehalem,
SandyBridge,
IvyBridge,
Haswell,
Broadwell,
Silvermont,
Skylake,
Airmont,
KabyLake,
Atom,
Broadwell,
CannonLake,
CometLake,
Core,
Goldmont,
GoldmontPlus,
CannonLake,
Haswell,
IceLake,
IvyBridge,
KabyLake,
Nehalem,
NetBurst,
SandyBridge,
Silvermont,
Skylake,
TigerLake,
Tremont
Tremont,
Unknown
}
// ReSharper disable InconsistentNaming