* Add Support for MSI B840P PRO WIFI
* Rectify loop mathematical operator syntax
* Add support for two additional motherboards
Z890 Gaming Plus Wifi and Pro Z890-S Wifi Project Zero
* Update LpcIO.cs
Add support for MSI MPG B850 EDGE TI WIFI (MS-7E62)
* Update Identification.cs
Add support for MSI MPG B850 EDGE TI WIFI (MS-7E62)
* Update Model.cs
Add support for MSI MPG B850 EDGE TI WIFI (MS-7E62)
* Add Identification Support for 15 new MSI AM5/LGA1851 Motherboards with the NCT6687D SIO Controller
* Create dummy chip entry NCT6687DR
* Assign NCT6687DR SIO to 15 newly added MSI AM5/LGA1851 Motherboards
This also requires passing Motherboard into DetectWinbondFintek() as we want to maintain prior compatibility while also assigning NCT6687DR to the new motherboards
* Add proper voltage, fan, and temperature sensor layouts for motherboards assigned the NCT6687DR controller
* Add support for NCT6687DR including dedicated fan control function for system fan manipulation
NCT6687DRFanCtrl() is only called when chip == NCT6687DR, otherwise legacy control is maintained. This function works by setting the 7-point fan curve of the system fans to the same requested value where the system fan has no choice but to comply
* Rectify code style in new functions to follow standards
* Update Nct677X.cs
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Co-authored-by: Alcolawl <tdean@live.esu.edu>
Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
* Add Support For Asus ROG Strix X870E-E Fan Sensors And Control
* Add voltages and temperatures
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Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
* Add support for ASUS ROG Crosshair X870E Hero motherboard
* Fix a typo
* Add CPU Package temperature sensor.
* Cleanup code
* Aligning W_PUMP+ naming to others
* Add Gigabyte X870E AORUS PRO (ICE)
* Separate case and rename some voltages
* Increase array size for Fans and Controls from 5 to 6
* Add external temperature sensor
* Check before entering bugged 0x4E IT87
* Specify fan control registers for IT8792E
* Refactor chip ID reading using TryReadWord
* Introduce ECIO gigabyte EC control
* Add ECIO compatibility check
* Refactor to consider result of read/write
* Refactor styles and syntaxes
* Rename SMFI to Smfi
* Remove public modifier for consistency
* Update code style
* Increase timeout and remove sleep for ecio waits
* Remove extra WaitIBE
* Rename IT8795E to IT87952E
IT8795E and IT87952E are distinct chips (with their own IC markings).
The IT8795E, as the IT8791E and IT8792E, reports chip ID 0x8733 whereas
the IT87952E identifies as 0x8695.
* Gigabyte EC: Fix typo in LPC register restore
When the AMD LPC Bridge registers are restored after configuring memory
mapping, restore the correct value for the "Memory Address for LPC
target cycles" register.
* Add IT87952E fan control for Gigabyte boards
IT87952E (ID 0x8695) has a third byte in SuperIO config space
(LDN 0x0F) that determines more bits of the host address for LPC memory
mapping.
Also the base address for Gigabyte boards is 0xFC000000 instead of
0xFF000000 (as is the case with IT8790/1/2/5).
This should make additional fan controls work on Gigabyte mainboards
where the settings had no effect previously, e.g: X570S AORUS MASTER
and X670E AORUS MASTER. (cf. Issue #251)
It does not yet work for Intel boards as the LPC bridge requires
different programming.
* Update LpcIO.cs
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Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
JoeBroesele