 namazso
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e6b8c42c15
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Add table size for version 0x540104 (#1099)
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2023-06-16 14:25:43 +02:00 |
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PhyxionNL
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c0f2740ed3
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Move mutexes out of Ring0
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2023-06-14 11:58:26 +02:00 |
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PhyxionNL
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20bf5bb1f7
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Check if ADL overdrive caps method exists and InpOut opened OK.
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2023-03-14 17:29:28 +01:00 |
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sebastian-devandPhyxionNL
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fe326e8877
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Zen 4 SMU Update (#915)
* Zen 4 SMU Update
* Misc
Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
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2022-12-01 10:52:10 +01:00 |
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PhyxionNL
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58cef111a1
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Use file-scoped namespaces (#842)
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2022-10-09 13:22:57 +02:00 |
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PhyxionNL
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3ac329f247
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Fix some code analysis issues (#841)
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2022-10-09 13:16:31 +02:00 |
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PhyxionNL
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38b97e10d0
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Update editorconfig + changes (#771)
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2022-06-29 19:38:57 +02:00 |
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K900
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4b0bf583e1
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RyzenSMU: add some more metrics for Zen3 (#750)
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2022-06-03 17:19:20 +02:00 |
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PhyxionNL
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0ed564e7c6
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Zen 3 smu (#652)
Thanks to @DevTechProfile
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2022-02-07 16:59:03 +01:00 |
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PhyxionNL
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65664fd75e
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Update RyzenSMU.cs
Fixes #613.
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2022-01-13 10:20:06 +01:00 |
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PhyxionNL
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9bf2447ab9
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https://github.com/LibreHardwareMonitor/LibreHardwareMonitor/issues/566#issuecomment-944841060
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2021-10-16 10:34:05 +02:00 |
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PhyxionNL
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1cd403a6fa
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If running under 32-bit mode, the DRAM table cannot be read as it's overflowing
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2021-09-29 11:44:50 +02:00 |
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PhyxionNL
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a10c33ec0a
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WinRing0 revert (#478)
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2021-06-21 18:30:21 +02:00 |
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kolos
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57140e219b
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Fix AMD sensor index for RR (#470)
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2021-06-14 18:12:05 +02:00 |
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kolos
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3df898af24
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Add Ryzen SMU support (#428)
Thanks to @kolos.
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2021-06-11 09:36:17 +02:00 |
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