* Add Intel Arc VRAM sensors support
- Implement BDF-based device matching for Intel discrete GPUs
- Add VRAM sensors (total, used, free, load percentage)
- Use D3D device enumeration with fallback logic
- Enable Windows-specific VRAM monitoring for Intel Arc GPUs
- Fix device identification to distinguish between multiple identical GPUs
Resolves issue where both Intel Arc GPUs showed identical VRAM values.
Now each GPU displays unique, accurate memory usage statistics.
* Add defensive validation to GetBdfFromDeviceIdentifier
- Add null/empty check for deviceIdentifier parameter
- Return false explicitly when LastIndexOf('#') returns -1
- Add DEVPROPTYPE.DEVPROP_TYPE_UINT32 validation after property queries
- Use sizeof(uint) instead of hardcoded 4 for buffer sizes
- Apply PCI spec bit masks (5-bit device, 3-bit function)
- Add bus range validation (0-255)
* Revert to Windows DEVPKEY_Device_Address spec masks
Use 0xFFFF masks as per Windows documentation instead of PCI spec
bit widths. The Windows API uses full 16-bit fields for device and
function numbers.
* Update IntelDiscreteGpu.cs
* Update NativeMethods.txt
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Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
* Support for 10 new MSI motherboards with NCT6687D-R SIO controller
* Support for newly established fan and control register structure
WILL ABSOLUTELY BREAK FAN CONTROL CONFIGS FOR NCT6687DR USERS. This introduces Support for 16 System Fans and Controls, including EZ-Connect, Pump Fan 2, and System Fan 7. Also improved the logic for nct6687dr control.
- Add GPU Memory Total, Used, Free sensors (SmallData type, in MB)
- Add GPU Memory load sensor (percentage)
- Add GPU Memory Read/Write bandwidth sensors (Throughput type, in B/s)
- Use D3DDisplayDevice API to query VRAM usage via Windows kernel
- Match Intel discrete GPUs using PCI vendor/device IDs
- Include fallback detection for Intel GPUs if initial matching fails
- Bandwidth sensors read from Intel GCL telemetry with unit conversion
* Try and migrate the old GigabyteController stuff with PawnIO
* Bring back WinRing0 era GigabyteController stuff
* ISABridge use the PawnIO module with its built-in logic
* Ecio uses LpcIO directly (not sure about the initialization logic in TryCreate() to make this work)
* Code-review
* Fix inverted logic
* Remove IsaBridgeEc field init
* Format document
* Combine logic
* Gigabyte Implementation best attempt
* Update IsaBridgeGigabyteController.cs
* Cleanup and fix enablind logic for Isa version
* Add debug logs
* Update IsaBridgeGigabyteController.cs
* Code review
* Unmap + restore the mmio state is done through the closing of the module.
* Fix boolean logic
* Restore the fan control byte instead
* Fallback to ECIO if FanControl enable byte is 0xFF
+ add logs to ECIO
* Port back to validation logic
* Allow for one or the other MMIO to be 0
* Wrap enter/exit mmio logic + enter/exit each time
* Keep state of EcioPort enable
* Missing dispose + close order fix
* Update IsaBridgeGigabyteController.cs
* Remove empty line before TryCreate method
* Code review
* Remove try/finally for SW
* Cleanup debug log methods
* Add DEBUG_LOG define conditional
* Misc
* Misc
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Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
* Begin CrOS implementation for Framework Laptops
* CrOS: Talk directly to the EC, instead of through ACPI
* Add a few Framework models
* Remove early Framework models
These have a different EC, and don't currently work
* Migrate CrOS ECs to PawnIO
* Implement EcCommand and read sensor names
* Add more Framework models
* Add some error handling
* Misc
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Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
* Make the Debug,WriteLine opt in with a symbol define
Having all these Debug,WriteLine made the update method painfully slow and the running process laggy during a debug session.
* Update Nct677X.cs
* Update Nct677X.cs
* Update Nct677X.cs
---------
Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
* Add support for MSI MEG Z790 GODLIKE MAX.
* Update LibreHardwareMonitorLib/Hardware/Motherboard/SuperIOHardware.cs
* Rename M2_1 to M2 #1 in temperature readings
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Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
* Replace Storage implementation with CrystalDiskInfo based implementation.
* Formatting.
* Code review.
* Code review.
* Increase space for attribute name in report.
* Implement dynamic disk handling for usage sensor.
Disable unused warnings.
* Further cleanup in NativeMethods.txt and referenced.
* Add ASRock X870E Nova WiFi Support
- Added support for Nuvoton NCT5585D chip
- Added support for Nuvoton NCT6796D-S chip
- Added motherboard-specific switch to select the correct chip due to duplicate chip ID/Revision (see #2005)
- Added chips to disable monitor i/o space lock block
- Added business logic to include chips in _superIOs.Add for the Nct677X() logic.
- Added chips to business logic to properly assign indices for fans, controls, temperatures and voltages.
- Added TSENSOR to the enum for SourceNct67Xxd to display the 3rd thermistor sensor.
- Added Naming and Identification for the X870E Nova WiFi
- Supressed warnings and added documentation
* Corrections
These changes reflect scraping the datasheet for the correct registers, half-registers, halfBits, sourceRegisters and alternateRegisters
- Replaced TSENSOR with AUXTIN5 as it is named in the datasheet
- Corrected Register values
- Reworked indexes and temperature naming
* Requested Changes
- Linked to PR instead of Datasheet which may change.
- Changed descriptions to be more understandable rather than using Datasheet labels
* Removed duplicate TSENSOR in enum
