Added experimental support for Intel 06_A5h CPUs

Thanks to @moellerm.
This commit is contained in:
Phyxion
2020-05-25 11:28:45 +02:00
parent 5088bc7277
commit fe662558f4
@@ -170,6 +170,7 @@ namespace LibreHardwareMonitor.Hardware.CPU
_microArchitecture = MicroArchitecture.IceLake;
tjMax = GetTjMaxFromMsr();
break;
case 0xA5:
case 0xA6: // Intel Core i3, i5, i7 10xxxU (14nm)
_microArchitecture = MicroArchitecture.CometLake;
tjMax = GetTjMaxFromMsr();