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Added support for Lunar Lake CPUs (#1520)

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* Added support for Lunar Lake CPUs

* Fixed a typo
This commit is contained in:
Howon Lee
2024-11-12 18:45:16 +01:00
committed by GitHub
parent ca6cc82ac6
commit cc303f75c5
1 changed files with 16 additions and 7 deletions
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LibreHardwareMonitorLib/Hardware/Cpu/IntelCpu.cs
+16 -7
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@@ -220,13 +220,18 @@ internal sealed class IntelCpu : GenericCpu
case 0xA7: // Intel Core i5, i6, i7 11xxx (14nm) (Rocket Lake)
_microArchitecture = MicroArchitecture.RocketLake;
tjMax = GetTjMaxFromMsr();
break;
break;
case 0xC6: // Intel Core Ultra 7 200 Series ArrowLake
_microArchitecture = MicroArchitecture.ArrowLake;
tjMax = GetTjMaxFromMsr();
break;
break;
case 0xBD: // Intel Core Ultra 5/7 200 Series LunarLake
_microArchitecture = MicroArchitecture.LunarLake;
tjMax = GetTjMaxFromMsr();
break;
default:
_microArchitecture = MicroArchitecture.Unknown;
tjMax = Floats(100);
@@ -272,7 +277,7 @@ internal sealed class IntelCpu : GenericCpu
break;
case MicroArchitecture.Airmont:
case MicroArchitecture.AlderLake:
case MicroArchitecture.AlderLake:
case MicroArchitecture.ArrowLake:
case MicroArchitecture.Broadwell:
case MicroArchitecture.CannonLake:
@@ -284,6 +289,7 @@ internal sealed class IntelCpu : GenericCpu
case MicroArchitecture.IvyBridge:
case MicroArchitecture.JasperLake:
case MicroArchitecture.KabyLake:
case MicroArchitecture.LunarLake:
case MicroArchitecture.Nehalem:
case MicroArchitecture.MeteorLake:
case MicroArchitecture.RaptorLake:
@@ -387,7 +393,7 @@ internal sealed class IntelCpu : GenericCpu
}
if (_microArchitecture is MicroArchitecture.Airmont or
MicroArchitecture.AlderLake or
MicroArchitecture.AlderLake or
MicroArchitecture.ArrowLake or
MicroArchitecture.Broadwell or
MicroArchitecture.CannonLake or
@@ -399,6 +405,7 @@ internal sealed class IntelCpu : GenericCpu
MicroArchitecture.IvyBridge or
MicroArchitecture.JasperLake or
MicroArchitecture.KabyLake or
MicroArchitecture.LunarLake or
MicroArchitecture.MeteorLake or
MicroArchitecture.RaptorLake or
MicroArchitecture.RocketLake or
@@ -602,6 +609,7 @@ internal sealed class IntelCpu : GenericCpu
case MicroArchitecture.IvyBridge:
case MicroArchitecture.JasperLake:
case MicroArchitecture.KabyLake:
case MicroArchitecture.LunarLake:
case MicroArchitecture.MeteorLake:
case MicroArchitecture.RaptorLake:
case MicroArchitecture.RocketLake:
@@ -609,7 +617,7 @@ internal sealed class IntelCpu : GenericCpu
case MicroArchitecture.Silvermont:
case MicroArchitecture.Skylake:
case MicroArchitecture.TigerLake:
case MicroArchitecture.Tremont:
case MicroArchitecture.Tremont:
_coreClocks[i].Value = (float)(((eax >> 8) & 0xff) * newBusClock);
break;
default:
@@ -690,6 +698,7 @@ internal sealed class IntelCpu : GenericCpu
IvyBridge,
JasperLake,
KabyLake,
LunarLake,
Nehalem,
NetBurst,
MeteorLake,