665 lines
30 KiB
C#
665 lines
30 KiB
C#
// This Source Code Form is subject to the terms of the Mozilla Public License, v. 2.0.
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// If a copy of the MPL was not distributed with this file, You can obtain one at http://mozilla.org/MPL/2.0/.
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// Copyright (C) LibreHardwareMonitor and Contributors.
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// Partial Copyright (C) Michael Möller <mmoeller@openhardwaremonitor.org> and Contributors.
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// All Rights Reserved.
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using System;
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using System.Diagnostics.CodeAnalysis;
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using System.Globalization;
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using System.Text;
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namespace LibreHardwareMonitor.Hardware.CPU
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{
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internal sealed class IntelCpu : GenericCpu
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{
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private readonly Sensor _busClock;
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private readonly Sensor _coreAvg;
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private readonly Sensor[] _coreClocks;
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private readonly Sensor _coreMax;
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private readonly Sensor[] _coreTemperatures;
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private readonly Sensor[] _distToTjMaxTemperatures;
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private readonly uint[] _energyStatusMsrs = { MSR_PKG_ENERY_STATUS, MSR_PP0_ENERY_STATUS, MSR_PP1_ENERY_STATUS, MSR_DRAM_ENERGY_STATUS };
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private readonly float _energyUnitMultiplier;
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private readonly uint[] _lastEnergyConsumed;
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private readonly DateTime[] _lastEnergyTime;
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private readonly MicroArchitecture _microArchitecture;
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private readonly Sensor _packageTemperature;
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private readonly Sensor[] _powerSensors;
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private readonly double _timeStampCounterMultiplier;
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public float EnergyUnitsMultiplier => _energyUnitMultiplier;
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public IntelCpu(int processorIndex, CpuId[][] cpuId, ISettings settings) : base(processorIndex, cpuId, settings)
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{
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// set tjMax
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float[] tjMax;
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switch (_family)
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{
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case 0x06:
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{
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switch (_model)
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{
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case 0x0F: // Intel Core 2 (65nm)
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_microArchitecture = MicroArchitecture.Core;
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switch (_stepping)
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{
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case 0x06: // B2
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switch (_coreCount)
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{
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case 2:
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tjMax = Floats(80 + 10);
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break;
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case 4:
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tjMax = Floats(90 + 10);
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break;
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default:
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tjMax = Floats(85 + 10);
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break;
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}
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break;
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case 0x0B: // G0
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tjMax = Floats(90 + 10);
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break;
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case 0x0D: // M0
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tjMax = Floats(85 + 10);
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break;
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default:
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tjMax = Floats(85 + 10);
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break;
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}
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break;
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case 0x17: // Intel Core 2 (45nm)
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_microArchitecture = MicroArchitecture.Core;
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tjMax = Floats(100);
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break;
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case 0x1C: // Intel Atom (45nm)
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_microArchitecture = MicroArchitecture.Atom;
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switch (_stepping)
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{
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case 0x02: // C0
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tjMax = Floats(90);
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break;
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case 0x0A: // A0, B0
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tjMax = Floats(100);
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break;
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default:
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tjMax = Floats(90);
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break;
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}
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break;
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case 0x1A: // Intel Core i7 LGA1366 (45nm)
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case 0x1E: // Intel Core i5, i7 LGA1156 (45nm)
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case 0x1F: // Intel Core i5, i7
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case 0x25: // Intel Core i3, i5, i7 LGA1156 (32nm)
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case 0x2C: // Intel Core i7 LGA1366 (32nm) 6 Core
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case 0x2E: // Intel Xeon Processor 7500 series (45nm)
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case 0x2F: // Intel Xeon Processor (32nm)
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_microArchitecture = MicroArchitecture.Nehalem;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x2A: // Intel Core i5, i7 2xxx LGA1155 (32nm)
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case 0x2D: // Next Generation Intel Xeon, i7 3xxx LGA2011 (32nm)
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_microArchitecture = MicroArchitecture.SandyBridge;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x3A: // Intel Core i5, i7 3xxx LGA1155 (22nm)
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case 0x3E: // Intel Core i7 4xxx LGA2011 (22nm)
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_microArchitecture = MicroArchitecture.IvyBridge;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x3C: // Intel Core i5, i7 4xxx LGA1150 (22nm)
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case 0x3F: // Intel Xeon E5-2600/1600 v3, Core i7-59xx
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// LGA2011-v3, Haswell-E (22nm)
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case 0x45: // Intel Core i5, i7 4xxxU (22nm)
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case 0x46:
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_microArchitecture = MicroArchitecture.Haswell;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x3D: // Intel Core M-5xxx (14nm)
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case 0x47: // Intel i5, i7 5xxx, Xeon E3-1200 v4 (14nm)
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case 0x4F: // Intel Xeon E5-26xx v4
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case 0x56: // Intel Xeon D-15xx
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_microArchitecture = MicroArchitecture.Broadwell;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x36: // Intel Atom S1xxx, D2xxx, N2xxx (32nm)
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_microArchitecture = MicroArchitecture.Atom;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x37: // Intel Atom E3xxx, Z3xxx (22nm)
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case 0x4A:
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case 0x4D: // Intel Atom C2xxx (22nm)
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case 0x5A:
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case 0x5D:
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_microArchitecture = MicroArchitecture.Silvermont;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x4E:
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case 0x5E: // Intel Core i5, i7 6xxxx LGA1151 (14nm)
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case 0x55: // Intel Core X i7, i9 7xxx LGA2066 (14nm)
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_microArchitecture = MicroArchitecture.Skylake;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x4C: // Intel Airmont (Cherry Trail, Braswell)
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_microArchitecture = MicroArchitecture.Airmont;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x8E: // Intel Core i5, i7 7xxxx (14nm) (Kaby Lake) and 8xxxx (14nm++) (Coffee Lake)
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case 0x9E:
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_microArchitecture = MicroArchitecture.KabyLake;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x5C: // Goldmont (Apollo Lake)
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case 0x5F: // (Denverton)
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_microArchitecture = MicroArchitecture.Goldmont;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x7A: // Goldmont plus (Gemini Lake)
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_microArchitecture = MicroArchitecture.GoldmontPlus;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x66: // Intel Core i3 8xxx (10nm) (Cannon Lake)
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_microArchitecture = MicroArchitecture.CannonLake;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x7D: // Intel Core i3, i5, i7 10xxx (10nm) (Ice Lake)
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case 0x7E:
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case 0x6A: // Ice Lake server
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case 0x6C:
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_microArchitecture = MicroArchitecture.IceLake;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0xA5:
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case 0xA6: // Intel Core i3, i5, i7 10xxxU (14nm)
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_microArchitecture = MicroArchitecture.CometLake;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x86: // Tremont (10nm) (Elkhart Lake, Skyhawk Lake)
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_microArchitecture = MicroArchitecture.Tremont;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x8C: // Tiger Lake (10nm)
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case 0x8D:
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_microArchitecture = MicroArchitecture.TigerLake;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x97: // Alder Lake (7nm)
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_microArchitecture = MicroArchitecture.AlderLake;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0x9C: // Jasper Lake (10nm)
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_microArchitecture = MicroArchitecture.JasperLake;
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tjMax = GetTjMaxFromMsr();
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break;
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case 0xA7: // Intel Core i5, i6, i7 11xxx (14nm) (Rocket Lake)
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_microArchitecture = MicroArchitecture.RocketLake;
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tjMax = GetTjMaxFromMsr();
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break;
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default:
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_microArchitecture = MicroArchitecture.Unknown;
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tjMax = Floats(100);
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break;
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}
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}
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break;
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case 0x0F:
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{
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switch (_model)
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{
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case 0x00: // Pentium 4 (180nm)
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case 0x01: // Pentium 4 (130nm)
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case 0x02: // Pentium 4 (130nm)
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case 0x03: // Pentium 4, Celeron D (90nm)
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case 0x04: // Pentium 4, Pentium D, Celeron D (90nm)
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case 0x06: // Pentium 4, Pentium D, Celeron D (65nm)
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_microArchitecture = MicroArchitecture.NetBurst;
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tjMax = Floats(100);
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break;
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default:
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_microArchitecture = MicroArchitecture.Unknown;
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tjMax = Floats(100);
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break;
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}
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}
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break;
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default:
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_microArchitecture = MicroArchitecture.Unknown;
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tjMax = Floats(100);
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break;
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}
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// set timeStampCounterMultiplier
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switch (_microArchitecture)
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{
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case MicroArchitecture.Atom:
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case MicroArchitecture.Core:
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case MicroArchitecture.NetBurst:
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{
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if (Ring0.ReadMsr(IA32_PERF_STATUS, out uint _, out uint edx))
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{
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_timeStampCounterMultiplier = ((edx >> 8) & 0x1f) + 0.5 * ((edx >> 14) & 1);
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}
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break;
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}
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case MicroArchitecture.Airmont:
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case MicroArchitecture.AlderLake:
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case MicroArchitecture.Broadwell:
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case MicroArchitecture.CannonLake:
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case MicroArchitecture.CometLake:
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case MicroArchitecture.Goldmont:
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case MicroArchitecture.GoldmontPlus:
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case MicroArchitecture.Haswell:
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case MicroArchitecture.IceLake:
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case MicroArchitecture.IvyBridge:
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case MicroArchitecture.JasperLake:
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case MicroArchitecture.KabyLake:
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case MicroArchitecture.Nehalem:
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case MicroArchitecture.RocketLake:
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case MicroArchitecture.SandyBridge:
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case MicroArchitecture.Silvermont:
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case MicroArchitecture.Skylake:
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case MicroArchitecture.TigerLake:
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case MicroArchitecture.Tremont:
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{
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if (Ring0.ReadMsr(MSR_PLATFORM_INFO, out uint eax, out uint _))
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{
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_timeStampCounterMultiplier = (eax >> 8) & 0xff;
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}
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}
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break;
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default:
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_timeStampCounterMultiplier = 0;
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break;
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}
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int coreSensorId = 0;
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// check if processor supports a digital thermal sensor at core level
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if (cpuId[0][0].Data.GetLength(0) > 6 && (cpuId[0][0].Data[6, 0] & 1) != 0 && _microArchitecture != MicroArchitecture.Unknown)
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{
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_coreTemperatures = new Sensor[_coreCount];
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for (int i = 0; i < _coreTemperatures.Length; i++)
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{
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_coreTemperatures[i] = new Sensor(CoreString(i),
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coreSensorId,
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SensorType.Temperature,
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this,
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new[]
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{
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new ParameterDescription("TjMax [°C]", "TjMax temperature of the core sensor.\n" + "Temperature = TjMax - TSlope * Value.", tjMax[i]),
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new ParameterDescription("TSlope [°C]", "Temperature slope of the digital thermal sensor.\n" + "Temperature = TjMax - TSlope * Value.", 1)
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},
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settings);
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ActivateSensor(_coreTemperatures[i]);
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coreSensorId++;
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}
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}
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else
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_coreTemperatures = new Sensor[0];
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// check if processor supports a digital thermal sensor at package level
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if (cpuId[0][0].Data.GetLength(0) > 6 && (cpuId[0][0].Data[6, 0] & 0x40) != 0 && _microArchitecture != MicroArchitecture.Unknown)
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{
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_packageTemperature = new Sensor("CPU Package",
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coreSensorId,
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SensorType.Temperature,
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this,
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new[]
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{
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new ParameterDescription("TjMax [°C]", "TjMax temperature of the package sensor.\n" + "Temperature = TjMax - TSlope * Value.", tjMax[0]),
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new ParameterDescription("TSlope [°C]", "Temperature slope of the digital thermal sensor.\n" + "Temperature = TjMax - TSlope * Value.", 1)
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},
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settings);
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ActivateSensor(_packageTemperature);
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coreSensorId++;
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}
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// dist to tjmax sensor
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if (cpuId[0][0].Data.GetLength(0) > 6 && (cpuId[0][0].Data[6, 0] & 1) != 0 && _microArchitecture != MicroArchitecture.Unknown)
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{
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_distToTjMaxTemperatures = new Sensor[_coreCount];
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for (int i = 0; i < _distToTjMaxTemperatures.Length; i++)
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{
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_distToTjMaxTemperatures[i] = new Sensor(CoreString(i) + " Distance to TjMax", coreSensorId, SensorType.Temperature, this, settings);
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ActivateSensor(_distToTjMaxTemperatures[i]);
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coreSensorId++;
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}
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}
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else
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_distToTjMaxTemperatures = new Sensor[0];
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//core temp avg and max value
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//is only available when the cpu has more than 1 core
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if (cpuId[0][0].Data.GetLength(0) > 6 && (cpuId[0][0].Data[6, 0] & 0x40) != 0 && _microArchitecture != MicroArchitecture.Unknown && _coreCount > 1)
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{
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_coreMax = new Sensor("Core Max", coreSensorId, SensorType.Temperature, this, settings);
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ActivateSensor(_coreMax);
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coreSensorId++;
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_coreAvg = new Sensor("Core Average", coreSensorId, SensorType.Temperature, this, settings);
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ActivateSensor(_coreAvg);
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}
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else
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{
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_coreMax = null;
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_coreAvg = null;
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}
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_busClock = new Sensor("Bus Speed", 0, SensorType.Clock, this, settings);
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_coreClocks = new Sensor[_coreCount];
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for (int i = 0; i < _coreClocks.Length; i++)
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{
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_coreClocks[i] = new Sensor(CoreString(i), i + 1, SensorType.Clock, this, settings);
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if (HasTimeStampCounter && _microArchitecture != MicroArchitecture.Unknown)
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ActivateSensor(_coreClocks[i]);
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}
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if (_microArchitecture == MicroArchitecture.Airmont ||
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_microArchitecture == MicroArchitecture.AlderLake ||
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_microArchitecture == MicroArchitecture.Broadwell ||
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_microArchitecture == MicroArchitecture.CannonLake ||
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_microArchitecture == MicroArchitecture.CometLake ||
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_microArchitecture == MicroArchitecture.Goldmont ||
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_microArchitecture == MicroArchitecture.GoldmontPlus ||
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_microArchitecture == MicroArchitecture.Haswell ||
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_microArchitecture == MicroArchitecture.IceLake ||
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_microArchitecture == MicroArchitecture.IvyBridge ||
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_microArchitecture == MicroArchitecture.JasperLake ||
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_microArchitecture == MicroArchitecture.KabyLake ||
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_microArchitecture == MicroArchitecture.RocketLake ||
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_microArchitecture == MicroArchitecture.SandyBridge ||
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_microArchitecture == MicroArchitecture.Silvermont ||
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_microArchitecture == MicroArchitecture.Skylake ||
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_microArchitecture == MicroArchitecture.TigerLake ||
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_microArchitecture == MicroArchitecture.Tremont)
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{
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_powerSensors = new Sensor[_energyStatusMsrs.Length];
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_lastEnergyTime = new DateTime[_energyStatusMsrs.Length];
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_lastEnergyConsumed = new uint[_energyStatusMsrs.Length];
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if (Ring0.ReadMsr(MSR_RAPL_POWER_UNIT, out uint eax, out uint _))
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switch (_microArchitecture)
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{
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case MicroArchitecture.Silvermont:
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case MicroArchitecture.Airmont:
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_energyUnitMultiplier = 1.0e-6f * (1 << (int)((eax >> 8) & 0x1F));
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break;
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default:
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_energyUnitMultiplier = 1.0f / (1 << (int)((eax >> 8) & 0x1F));
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break;
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}
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if (_energyUnitMultiplier != 0)
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{
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string[] powerSensorLabels = { "CPU Package", "CPU Cores", "CPU Graphics", "CPU Memory" };
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for (int i = 0; i < _energyStatusMsrs.Length; i++)
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{
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if (!Ring0.ReadMsr(_energyStatusMsrs[i], out eax, out uint _))
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continue;
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// Don't show the "GPU Graphics" sensor on windows, it will show up under the GPU instead.
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if (i == 2 && !Software.OperatingSystem.IsUnix)
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continue;
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_lastEnergyTime[i] = DateTime.UtcNow;
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_lastEnergyConsumed[i] = eax;
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_powerSensors[i] = new Sensor(powerSensorLabels[i],
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i,
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SensorType.Power,
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this,
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settings);
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ActivateSensor(_powerSensors[i]);
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}
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}
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}
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Update();
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}
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private float[] Floats(float f)
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{
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float[] result = new float[_coreCount];
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for (int i = 0; i < _coreCount; i++)
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result[i] = f;
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return result;
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}
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private float[] GetTjMaxFromMsr()
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{
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float[] result = new float[_coreCount];
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for (int i = 0; i < _coreCount; i++)
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{
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if (Ring0.ReadMsr(IA32_TEMPERATURE_TARGET, out uint eax, out uint _, _cpuId[i][0].Affinity))
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result[i] = (eax >> 16) & 0xFF;
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else
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result[i] = 100;
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}
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return result;
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}
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protected override uint[] GetMsrs()
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{
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return new[]
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{
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MSR_PLATFORM_INFO,
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IA32_PERF_STATUS,
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IA32_THERM_STATUS_MSR,
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IA32_TEMPERATURE_TARGET,
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IA32_PACKAGE_THERM_STATUS,
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MSR_RAPL_POWER_UNIT,
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MSR_PKG_ENERY_STATUS,
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MSR_DRAM_ENERGY_STATUS,
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MSR_PP0_ENERY_STATUS,
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MSR_PP1_ENERY_STATUS
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};
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}
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public override string GetReport()
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{
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StringBuilder r = new StringBuilder();
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r.Append(base.GetReport());
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r.Append("MicroArchitecture: ");
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|
r.AppendLine(_microArchitecture.ToString());
|
|
r.Append("Time Stamp Counter Multiplier: ");
|
|
r.AppendLine(_timeStampCounterMultiplier.ToString(CultureInfo.InvariantCulture));
|
|
r.AppendLine();
|
|
return r.ToString();
|
|
}
|
|
|
|
public override void Update()
|
|
{
|
|
base.Update();
|
|
|
|
float coreMax = float.MinValue;
|
|
float coreAvg = 0;
|
|
|
|
for (int i = 0; i < _coreTemperatures.Length; i++)
|
|
{
|
|
// if reading is valid
|
|
if (Ring0.ReadMsr(IA32_THERM_STATUS_MSR, out uint eax, out uint _, _cpuId[i][0].Affinity) && (eax & 0x80000000) != 0)
|
|
{
|
|
// get the dist from tjMax from bits 22:16
|
|
float deltaT = (eax & 0x007F0000) >> 16;
|
|
float tjMax = _coreTemperatures[i].Parameters[0].Value;
|
|
float tSlope = _coreTemperatures[i].Parameters[1].Value;
|
|
_coreTemperatures[i].Value = tjMax - tSlope * deltaT;
|
|
|
|
coreAvg += (float)_coreTemperatures[i].Value;
|
|
if (coreMax < _coreTemperatures[i].Value)
|
|
coreMax = (float)_coreTemperatures[i].Value;
|
|
|
|
_distToTjMaxTemperatures[i].Value = deltaT;
|
|
}
|
|
else
|
|
{
|
|
_coreTemperatures[i].Value = null;
|
|
_distToTjMaxTemperatures[i].Value = null;
|
|
}
|
|
}
|
|
|
|
//calculate average cpu temperature over all cores
|
|
if (_coreMax != null && coreMax != float.MinValue)
|
|
{
|
|
_coreMax.Value = coreMax;
|
|
coreAvg /= _coreTemperatures.Length;
|
|
_coreAvg.Value = coreAvg;
|
|
}
|
|
|
|
if (_packageTemperature != null)
|
|
{
|
|
// if reading is valid
|
|
if (Ring0.ReadMsr(IA32_PACKAGE_THERM_STATUS, out uint eax, out uint _, _cpuId[0][0].Affinity) && (eax & 0x80000000) != 0)
|
|
{
|
|
// get the dist from tjMax from bits 22:16
|
|
float deltaT = (eax & 0x007F0000) >> 16;
|
|
float tjMax = _packageTemperature.Parameters[0].Value;
|
|
float tSlope = _packageTemperature.Parameters[1].Value;
|
|
_packageTemperature.Value = tjMax - tSlope * deltaT;
|
|
}
|
|
else
|
|
{
|
|
_packageTemperature.Value = null;
|
|
}
|
|
}
|
|
|
|
if (HasTimeStampCounter && _timeStampCounterMultiplier > 0)
|
|
{
|
|
double newBusClock = 0;
|
|
for (int i = 0; i < _coreClocks.Length; i++)
|
|
{
|
|
System.Threading.Thread.Sleep(1);
|
|
if (Ring0.ReadMsr(IA32_PERF_STATUS, out uint eax, out uint _, _cpuId[i][0].Affinity))
|
|
{
|
|
newBusClock = TimeStampCounterFrequency / _timeStampCounterMultiplier;
|
|
switch (_microArchitecture)
|
|
{
|
|
case MicroArchitecture.Nehalem:
|
|
{
|
|
uint multiplier = eax & 0xff;
|
|
_coreClocks[i].Value = (float)(multiplier * newBusClock);
|
|
break;
|
|
}
|
|
case MicroArchitecture.Airmont:
|
|
case MicroArchitecture.AlderLake:
|
|
case MicroArchitecture.Broadwell:
|
|
case MicroArchitecture.CannonLake:
|
|
case MicroArchitecture.CometLake:
|
|
case MicroArchitecture.Goldmont:
|
|
case MicroArchitecture.GoldmontPlus:
|
|
case MicroArchitecture.Haswell:
|
|
case MicroArchitecture.IceLake:
|
|
case MicroArchitecture.IvyBridge:
|
|
case MicroArchitecture.JasperLake:
|
|
case MicroArchitecture.KabyLake:
|
|
case MicroArchitecture.RocketLake:
|
|
case MicroArchitecture.SandyBridge:
|
|
case MicroArchitecture.Silvermont:
|
|
case MicroArchitecture.Skylake:
|
|
case MicroArchitecture.TigerLake:
|
|
case MicroArchitecture.Tremont:
|
|
{
|
|
uint multiplier = (eax >> 8) & 0xff;
|
|
_coreClocks[i].Value = (float)(multiplier * newBusClock);
|
|
break;
|
|
}
|
|
default:
|
|
{
|
|
double multiplier = ((eax >> 8) & 0x1f) + 0.5 * ((eax >> 14) & 1);
|
|
_coreClocks[i].Value = (float)(multiplier * newBusClock);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
// if IA32_PERF_STATUS is not available, assume TSC frequency
|
|
_coreClocks[i].Value = (float)TimeStampCounterFrequency;
|
|
}
|
|
}
|
|
|
|
if (newBusClock > 0)
|
|
{
|
|
_busClock.Value = (float)newBusClock;
|
|
ActivateSensor(_busClock);
|
|
}
|
|
}
|
|
|
|
if (_powerSensors != null)
|
|
{
|
|
foreach (Sensor sensor in _powerSensors)
|
|
{
|
|
if (sensor == null)
|
|
continue;
|
|
|
|
if (!Ring0.ReadMsr(_energyStatusMsrs[sensor.Index], out uint eax, out uint _))
|
|
continue;
|
|
|
|
|
|
DateTime time = DateTime.UtcNow;
|
|
uint energyConsumed = eax;
|
|
float deltaTime = (float)(time - _lastEnergyTime[sensor.Index]).TotalSeconds;
|
|
if (deltaTime < 0.01)
|
|
continue;
|
|
|
|
|
|
sensor.Value = _energyUnitMultiplier * unchecked(energyConsumed - _lastEnergyConsumed[sensor.Index]) / deltaTime;
|
|
_lastEnergyTime[sensor.Index] = time;
|
|
_lastEnergyConsumed[sensor.Index] = energyConsumed;
|
|
}
|
|
}
|
|
}
|
|
|
|
[SuppressMessage("ReSharper", "IdentifierTypo")]
|
|
private enum MicroArchitecture
|
|
{
|
|
Airmont,
|
|
AlderLake,
|
|
Atom,
|
|
Broadwell,
|
|
CannonLake,
|
|
CometLake,
|
|
Core,
|
|
Goldmont,
|
|
GoldmontPlus,
|
|
Haswell,
|
|
IceLake,
|
|
IvyBridge,
|
|
JasperLake,
|
|
KabyLake,
|
|
Nehalem,
|
|
NetBurst,
|
|
RocketLake,
|
|
SandyBridge,
|
|
Silvermont,
|
|
Skylake,
|
|
TigerLake,
|
|
Tremont,
|
|
Unknown
|
|
}
|
|
|
|
// ReSharper disable InconsistentNaming
|
|
private const uint IA32_PACKAGE_THERM_STATUS = 0x1B1;
|
|
private const uint IA32_PERF_STATUS = 0x0198;
|
|
private const uint IA32_TEMPERATURE_TARGET = 0x01A2;
|
|
private const uint IA32_THERM_STATUS_MSR = 0x019C;
|
|
|
|
private const uint MSR_DRAM_ENERGY_STATUS = 0x619;
|
|
private const uint MSR_PKG_ENERY_STATUS = 0x611;
|
|
private const uint MSR_PLATFORM_INFO = 0xCE;
|
|
private const uint MSR_PP0_ENERY_STATUS = 0x639;
|
|
private const uint MSR_PP1_ENERY_STATUS = 0x641;
|
|
|
|
private const uint MSR_RAPL_POWER_UNIT = 0x606;
|
|
// ReSharper restore InconsistentNaming
|
|
}
|
|
}
|