From e0cc2e2d4ea6e8cd052a9363f9dfb960532f40a9 Mon Sep 17 00:00:00 2001 From: "Betalos (Oussama Thoura)" Date: Mon, 24 Nov 2025 16:39:05 +0100 Subject: [PATCH] FIX Correctly Initialize NCT67XX registries (#2069) * FIX Correctly Initialize NCT67XX registries * FIX Correclty address X570 phantom temp indexes * FIX File formatings --- .../Hardware/Motherboard/Lpc/Nct677X.cs | 114 +++++++++++++----- .../Hardware/Motherboard/SuperIOHardware.cs | 4 +- 2 files changed, 89 insertions(+), 29 deletions(-) diff --git a/LibreHardwareMonitorLib/Hardware/Motherboard/Lpc/Nct677X.cs b/LibreHardwareMonitorLib/Hardware/Motherboard/Lpc/Nct677X.cs index b2d61e5..447aea4 100644 --- a/LibreHardwareMonitorLib/Hardware/Motherboard/Lpc/Nct677X.cs +++ b/LibreHardwareMonitorLib/Hardware/Motherboard/Lpc/Nct677X.cs @@ -185,16 +185,61 @@ internal class Nct677X : ISuperIO switch (chip) { - case Chip.NCT6791D: - case Chip.NCT6792D: + // --- GROUP A: NCT6793D/6795D (Common features, separated from 6796/98 by AUXTIN4/TSENSOR) --- case Chip.NCT6793D: case Chip.NCT6795D: + case Chip.NCT6791D: // Assuming 6791/92 use a similar core map but less features than 6795 + case Chip.NCT6792D: + case Chip.NCT6701D: // Defaulting to this group if map is less feature-rich than 6796/98 + temperaturesSources.AddRange(new TemperatureSourceData[] + { + // Note: Linux labels start at index 1 (0 is empty). + // Indices 1-6 are consistent (SYSTIN, CPUTIN, AUXTIN0-3) + new(SourceNct67Xxd.PECI_0, 0x073, 0x074, 7, 0x100), // Index 0 in your list / PECI_0 is often 0x73 or 0x027 + new(SourceNct67Xxd.CPUTIN, 0x075, 0x076, 7, 0x200, 0x491), // Index 2 (CPUTIN) + new(SourceNct67Xxd.SYSTIN, 0x077, 0x078, 7, 0x300, 0x490), // Index 1 (SYSTIN) + new(SourceNct67Xxd.AUXTIN0, 0x079, 0x07A, 7, 0x800, 0x492), // Index 3 + new(SourceNct67Xxd.AUXTIN1, 0x07B, 0x07C, 7, 0x900, 0x493), // Index 4 + new(SourceNct67Xxd.AUXTIN2, 0x07D, 0x07E, 7, 0xA00, 0x494), // Index 5 + new(SourceNct67Xxd.AUXTIN3, 0x4A0, 0x49E, 6, 0xB00, 0x495), // Index 6 + + // AUXTIN4 (AUXTIN4 is missing or unnamed in 6793/6795 label array) + // Keeping AUXTIN4 here with original register mapping for compatibility, but moving down. + new(SourceNct67Xxd.AUXTIN4, 0x027, 0, -1, 0x621), + + // PECI / PCH Group (Indices 16-25 in Linux labels) + new(SourceNct67Xxd.PECI_1, 0x672, 0, -1, 0xC27), + new(SourceNct67Xxd.PCH_CHIP_CPU_MAX_TEMP, 0x674, 0, -1, 0xC28, 0x400), // Index 18 (0x400 alt reg) + new(SourceNct67Xxd.PCH_CHIP_TEMP, 0x676, 0, -1, 0xC29, 0x401), // Index 19 (0x401 alt reg) + new(SourceNct67Xxd.PCH_CPU_TEMP, 0x678, 0, -1, 0xC2A, 0x402), // Index 20 (0x402 alt reg) + new(SourceNct67Xxd.PCH_MCH_TEMP, 0x67A, 0, -1, 0xC2B, 0x404), // Index 21 (0x404 alt reg) + new(SourceNct67Xxd.AGENT0_DIMM0, 0x405, 0, -1), // Index 22 (0x405 alt reg) + new(SourceNct67Xxd.AGENT0_DIMM1, 0x406, 0, -1), // Index 23 (0x406 alt reg) + new(SourceNct67Xxd.AGENT1_DIMM0, 0x407, 0, -1), // Index 24 (0x407 alt reg) + new(SourceNct67Xxd.AGENT1_DIMM1, 0x408, 0, -1), // Index 25 (0x408 alt reg) + + // SMBUS Group (Indices 8-9 are consistent) + new(SourceNct67Xxd.SMBUSMASTER0, 0x150, 0x151, 7, 0x622), // Index 8 + new(SourceNct67Xxd.SMBUSMASTER1, 0x670, 0, -1, 0xC26), // Index 9 + + // BYTE TEMP, CALIBRATION, and VIRTUAL (Indices 26-31) + new(SourceNct67Xxd.BYTE_TEMP0, 0x419, 0, -1), // Index 26 + new(SourceNct67Xxd.BYTE_TEMP1, 0x41A, 0, -1), // Index 27 + new(SourceNct67Xxd.PECI_0_CAL, 0x4F4, 0, -1), // Index 28 + new(SourceNct67Xxd.PECI_1_CAL, 0x4F5, 0, -1), // Index 29 + new(SourceNct67Xxd.VIRTUAL_TEMP, 0), // Index 31 + new(SourceNct67Xxd.SPARE_TEMP, 0), + new(SourceNct67Xxd.SPARE_TEMP2, 0) + }); + break; + + // --- GROUP B: NCT6796D/6797D (Introduces AUXTIN4) --- case Chip.NCT6796D: case Chip.NCT6796DR: case Chip.NCT6797D: - case Chip.NCT6701D: temperaturesSources.AddRange(new TemperatureSourceData[] { + // Indices 1-7 are consistent with 6796 labels (AUXTIN4 is Index 7) new(SourceNct67Xxd.PECI_0, 0x073, 0x074, 7, 0x100), new(SourceNct67Xxd.CPUTIN, 0x075, 0x076, 7, 0x200, 0x491), new(SourceNct67Xxd.SYSTIN, 0x077, 0x078, 7, 0x300, 0x490), @@ -202,33 +247,40 @@ internal class Nct677X : ISuperIO new(SourceNct67Xxd.AUXTIN1, 0x07B, 0x07C, 7, 0x900, 0x493), new(SourceNct67Xxd.AUXTIN2, 0x07D, 0x07E, 7, 0xA00, 0x494), new(SourceNct67Xxd.AUXTIN3, 0x4A0, 0x49E, 6, 0xB00, 0x495), - new(SourceNct67Xxd.AUXTIN4, 0x027, 0, -1, 0x621), + new(SourceNct67Xxd.AUXTIN4, 0x027, 0, -1, 0x621), // Index 7 + + // SMBUS Group (Indices 8-9 are consistent) + new(SourceNct67Xxd.SMBUSMASTER0, 0x150, 0x151, 7, 0x622), + new(SourceNct67Xxd.SMBUSMASTER1, 0x670, 0, -1, 0xC26), + + // PECI / PCH / DIMM Group (Indices 16-25) + new(SourceNct67Xxd.PECI_1, 0x672, 0, -1, 0xC27), new(SourceNct67Xxd.PCH_CHIP_CPU_MAX_TEMP, 0x674, 0, -1, 0xC28, 0x400), new(SourceNct67Xxd.PCH_CHIP_TEMP, 0x676, 0, -1, 0xC29, 0x401), new(SourceNct67Xxd.PCH_CPU_TEMP, 0x678, 0, -1, 0xC2A, 0x402), new(SourceNct67Xxd.PCH_MCH_TEMP, 0x67A, 0, -1, 0xC2B, 0x404), - new(SourceNct67Xxd.AGENT0_DIMM0, 0x405), - new(SourceNct67Xxd.AGENT0_DIMM1, 0x406), - new(SourceNct67Xxd.AGENT1_DIMM0, 0x407), - new(SourceNct67Xxd.AGENT1_DIMM1, 0x408), - new(SourceNct67Xxd.SMBUSMASTER0, 0x150, 0x151, 7, 0x622), - new(SourceNct67Xxd.SMBUSMASTER1, 0x670, 0, -1, 0xC26), - new(SourceNct67Xxd.PECI_1, 0x672, 0, -1, 0xC27), - new(SourceNct67Xxd.BYTE_TEMP0, 0x419), - new(SourceNct67Xxd.BYTE_TEMP1, 0x41A), - new(SourceNct67Xxd.PECI_0_CAL, 0x4F4), - new(SourceNct67Xxd.PECI_1_CAL, 0x4F5), + new(SourceNct67Xxd.AGENT0_DIMM0, 0x405, 0, -1), + new(SourceNct67Xxd.AGENT0_DIMM1, 0x406, 0, -1), + new(SourceNct67Xxd.AGENT1_DIMM0, 0x407, 0, -1), + new(SourceNct67Xxd.AGENT1_DIMM1, 0x408, 0, -1), + + // BYTE TEMP, CALIBRATION, and VIRTUAL (Indices 26-31) + new(SourceNct67Xxd.BYTE_TEMP0, 0x419, 0, -1), + new(SourceNct67Xxd.BYTE_TEMP1, 0x41A, 0, -1), + new(SourceNct67Xxd.PECI_0_CAL, 0x4F4, 0, -1), + new(SourceNct67Xxd.PECI_1_CAL, 0x4F5, 0, -1), new(SourceNct67Xxd.VIRTUAL_TEMP, 0), new(SourceNct67Xxd.SPARE_TEMP, 0), new(SourceNct67Xxd.SPARE_TEMP2, 0) }); - break; + // --- GROUP D: NCT6798D/NCT6799D (Introduces AUXTIN5) --- case Chip.NCT6798D: case Chip.NCT6799D: temperaturesSources.AddRange(new TemperatureSourceData[] { + // Indices 1-7 are consistent (SYSTIN through AUXTIN4) new(SourceNct67Xxd.PECI_0, 0x073, 0x074, 7, 0x100), new(SourceNct67Xxd.CPUTIN, 0x075, 0x076, 7, 0x200, 0x491), new(SourceNct67Xxd.SYSTIN, 0x077, 0x078, 7, 0x300, 0x490), @@ -236,28 +288,36 @@ internal class Nct677X : ISuperIO new(SourceNct67Xxd.AUXTIN1, 0x07B, 0x07C, 7, 0x900, 0x493), new(SourceNct67Xxd.AUXTIN2, 0x07D, 0x07E, 7, 0xA00, 0x494), new(SourceNct67Xxd.AUXTIN3, 0x4A0, 0x49E, 6, 0xB00, 0x495), - new(SourceNct67Xxd.AUXTIN4, 0x027, 0, -1, 0x621), - new(SourceNct67Xxd.TSENSOR, 0x4A2, 0x4A1, 7, 0xC00, 0x496), + new(SourceNct67Xxd.AUXTIN4, 0x027, 0, -1, 0x621), // Index 7 + + // SMBUS Group (Indices 8-9 are consistent) new(SourceNct67Xxd.SMBUSMASTER0, 0x150, 0x151, 7, 0x622), new(SourceNct67Xxd.SMBUSMASTER1, 0x670, 0, -1, 0xC26), + + // AUXTIN5 (Index 13 is unique to NCT6799) + // Register map is assumed, as no specific register was given, but this is the slot. + new(SourceNct67Xxd.AUXTIN5, 0x4A3, 0x4A4, 7, 0xC00), + + // PECI / PCH / DIMM Group (Indices 16-25) new(SourceNct67Xxd.PECI_1, 0x672, 0, -1, 0xC27), new(SourceNct67Xxd.PCH_CHIP_CPU_MAX_TEMP, 0x674, 0, -1, 0xC28, 0x400), new(SourceNct67Xxd.PCH_CHIP_TEMP, 0x676, 0, -1, 0xC29, 0x401), new(SourceNct67Xxd.PCH_CPU_TEMP, 0x678, 0, -1, 0xC2A, 0x402), new(SourceNct67Xxd.PCH_MCH_TEMP, 0x67A, 0, -1, 0xC2B, 0x404), - new(SourceNct67Xxd.AGENT0_DIMM0, 0x405), - new(SourceNct67Xxd.AGENT0_DIMM1, 0x406), - new(SourceNct67Xxd.AGENT1_DIMM0, 0x407), - new(SourceNct67Xxd.AGENT1_DIMM1, 0x408), - new(SourceNct67Xxd.BYTE_TEMP0, 0x419), - new(SourceNct67Xxd.BYTE_TEMP1, 0x41A), - new(SourceNct67Xxd.PECI_0_CAL, 0x4F4), - new(SourceNct67Xxd.PECI_1_CAL, 0x4F5), + new(SourceNct67Xxd.AGENT0_DIMM0, 0x405, 0, -1), + new(SourceNct67Xxd.AGENT0_DIMM1, 0x406, 0, -1), + new(SourceNct67Xxd.AGENT1_DIMM0, 0x407, 0, -1), + new(SourceNct67Xxd.AGENT1_DIMM1, 0x408, 0, -1), + + // BYTE TEMP, CALIBRATION, and VIRTUAL (Indices 26-31) + new(SourceNct67Xxd.BYTE_TEMP0, 0x419, 0, -1), + new(SourceNct67Xxd.BYTE_TEMP1, 0x41A, 0, -1), + new(SourceNct67Xxd.PECI_0_CAL, 0x4F4, 0, -1), + new(SourceNct67Xxd.PECI_1_CAL, 0x4F5, 0, -1), new(SourceNct67Xxd.VIRTUAL_TEMP, 0), new(SourceNct67Xxd.SPARE_TEMP, 0), new(SourceNct67Xxd.SPARE_TEMP2, 0) }); - break; case Chip.NCT6796DS: diff --git a/LibreHardwareMonitorLib/Hardware/Motherboard/SuperIOHardware.cs b/LibreHardwareMonitorLib/Hardware/Motherboard/SuperIOHardware.cs index d44a08d..8981b04 100644 --- a/LibreHardwareMonitorLib/Hardware/Motherboard/SuperIOHardware.cs +++ b/LibreHardwareMonitorLib/Hardware/Motherboard/SuperIOHardware.cs @@ -3732,8 +3732,8 @@ internal sealed class SuperIOHardware : Hardware v.Add(new Voltage("+1.8V", 14, 1, 1)); //v.Add(new Voltage("Voltage #16", 15, true)); // unknown. VIN9 pin - t.Add(new Temperature("CPU", 9)); // AKA SMBUSMASTER0 - t.Add(new Temperature("Chipset", 10)); // AKA SMBUSMASTER1 + t.Add(new Temperature("CPU", 8)); // AKA SMBUSMASTER0 + t.Add(new Temperature("Chipset", 9)); // AKA SMBUSMASTER1 t.Add(new Temperature("Motherboard", 2)); // AKA SYSTIN // no idea what these sources are actually connected to.