From 1cd403a6fa7f846df6f25fd45f885fcf54b18e51 Mon Sep 17 00:00:00 2001
From: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
Date: Wed, 29 Sep 2021 11:44:50 +0200
Subject: [PATCH] If running under 32-bit mode, the DRAM table cannot be read
 as it's overflowing

---
 LibreHardwareMonitorLib/Hardware/RyzenSMU.cs | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/LibreHardwareMonitorLib/Hardware/RyzenSMU.cs b/LibreHardwareMonitorLib/Hardware/RyzenSMU.cs
index bf3b4de..74ffd9a 100644
--- a/LibreHardwareMonitorLib/Hardware/RyzenSMU.cs
+++ b/LibreHardwareMonitorLib/Hardware/RyzenSMU.cs
@@ -301,6 +301,10 @@ namespace LibreHardwareMonitor.Hardware
         {
             float[] table = new float[_pmTableSize / 4];
 
+            if (_dramBaseAddr > int.MaxValue)
+                return table;
+
+
             byte[] bytes = InpOut.ReadMemory(new IntPtr(_dramBaseAddr), _pmTableSize);
             if (bytes != null)
                 Buffer.BlockCopy(bytes, 0, table, 0, bytes.Length);
@@ -724,7 +728,7 @@ namespace LibreHardwareMonitor.Hardware
                         return false;
                     }
                 }
-                while (tmp == 0 && 0 != retries--);
+                while (tmp == 0 && retries-- != 0);
 
                 if (retries == 0 && tmp != (uint)Status.OK)
                 {
@@ -751,7 +755,7 @@ namespace LibreHardwareMonitor.Hardware
             return tmp == (uint)Status.OK;
         }
 
-        private void WriteReg(uint addr, uint data)
+        private static void WriteReg(uint addr, uint data)
         {
             if (Ring0.WaitPciBusMutex(10))
             {
@@ -764,7 +768,7 @@ namespace LibreHardwareMonitor.Hardware
             }
         }
 
-        private bool ReadReg(uint addr, ref uint data)
+        private static bool ReadReg(uint addr, ref uint data)
         {
             bool read = false;